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What (who) is VHDL-AMS - definition
VHDL-AMS
VHDL-AMS est un dérivé du langage de description matériel VHDL (norme IEEE 1076-1993). Il comprend des extensions analogiques et des signaux mixtes (en anglais analog and mixed-signal, AMS) afin de définir le comportement des systèmes à signaux analogiques et mixtes (IEEE 1076.
